Part 5: ZYNQ Architecture

Objective

This tutorial contains information about the ZYNQ SoC and a simple example that consists of an AXI GPIO. In this tutorial, you will learn how to program ZYNQ PS with C.

Source Code

This repository contains all of the code required in order to follow this tutorial.

zybo_tutorial/part_5 at main · weenslab/zybo_tutorialGitHub

References

• AMD Zynq™ 7000 SoCs, https://www.amd.com/en/products/adaptive-socs-and-fpgas/soc/zynq-7000.html
• Official PYNQ website, http://www.pynq.io/

1. Introduction to SoC FPGA

1.1. FPGA vs. SoC FPGA

One of the main differences between FPGAs and FPGA SoCs is the presence or absence of a hard processor. A hard processor is a processor that has been fabricated as silicon on an FPGA chip. This is different from a soft processor, which is an RTL design programmed into the FPGA.

Examples of soft processors are Microblaze (Xilinx/AMD) and Nios (Altera/Intel). One of the limitations of soft processors is their limited clock frequency (several hundred MHz). Meanwhile, the hard processor used on the Zynq is an ARM Cortex-A with a clock that can reach 1.5 GHz.

1.2. SoC FPGA vs. SoC

One of the main differences between FPGA SoCs and SoCs in general is whether there is an FPGA. Examples of SoCs are generally used in single-board computers, such as raspberries, and gadgets, such as smartphones and tablets.

Figure 1. Samsung Exynos SoC. Source: https://en.wikipedia.org/wiki/Exynos

This type of SoC usually does not have programmable logic (FPGA), only a processor, which usually uses ARM. Development on this SoC is only at the software level (firmware, OS, or application level).

1.3. ZYNQ Development Flow

Development on Zynq consists of two stages, namely hardware/FPGA/programmable logic (PL) development and software/firmware/processing system (PS).

Figure 2. ZYNQ architecture block diagram

The hardware development means that we create RTL modules with Verilog or VHDL, which later will be programmed into the FPGA.

The software development means we create programs in C, Python, or other languages that later will be programmed into the PS (or, in other words, run on an ARM Cortex CPU).

1.4. Hardware Development

The type of development hardware on ZYNQ consists of three types:

• Low-level development (Verilog, SystemVerilog, VHDL) with the main tool Vivado. Development is carried out using RTL design.

• Apart from that, there is high-level synthesis (HLS) with the C language. In HLS, the C code will still be generated into Verilog or VHDL by the HLS compiler. After becoming Verilog or VHDL code, you will still need Vivado to synthesize the design. HLS uses Vitis HLS/Vivado HLS. Apart from C, high-level development, we can also use MATLAB with a tool called Vitis Model Composer/Xilinx System Generator DSP.

• Vitis AI is not actually development hardware but uses a core called DPU that has been made by Xilinx. The cores are programmed into the FPGA. With Vitis AI, we can convert, optimize, and quantize AI models created using libraries such as TensorFlow into instruction sets that run on DPU.

Figure 3. Vitis AI structure. Source: https://www.xilinx.com/products/design-tools/vitis/vitis-ai.html#:~:text=The%20Vitis%20AI%20Library%20is,model%20deployment%20on%20AMD%20platforms.

1.5. Software Development

The type of software or embedded software on Zynq consists of three types:

1. Baremetal uses the C/C++ language using the Vitis SDK/Xilinx SDK tools.

2. RTOS uses real-time OS freeRTOS carried out on the Vitis SDK/Xilinx SDK tools.

3. Linux uses OS (PYNQ, PetaLinux, Custom Linux).

1.6. PYNQ

PYNQ (Python productivity for Zynq) is a framework and hardware ecosystem based on the Xilinx Zynq SoC FPGA that abstracts away some complexity and allows you to write simpler code that utilizes memory map access, hardware interrupts, and DMA under the Linux OS.

Figure 4. PYNQ architecture

The analogy is like an Arduino. Arduino consists of a framework, libraries, and hardware ecosystem. Arduino currently has quite a lot of boards that can support the Arduino framework. The first version of the Arduino board only had one version (ATmega). Currently, many microcontrollers are supported, such as STM, ESP, etc.

Just like the Arduino, PYNQ also does almost the same thing. PYNQ consists of Linux, its framework, libraries, and hardware ecosystem. PYNQ currently has several supported boards. Such as PYNQ-Z1, PYNQ-Z2, ZCU 104, Kria, RFSoC 4x2, and even Alveo.

PYNQ is a Linux framework and library that will be installed on a microSD and run on a Zynq SoC FPGA, making the SoC FPGA like an embedded Linux board. The analogy is also like a Raspberry Pi, which is equipped with an FPGA. We can connect a monitor, keyboard, and mouse to the Zynq board (certain boards that support it) and use it like a Raspberry Pi or a computer in general.

In conclusion, PYNQ abstracts the complexity of Linux, which allows users to create Linux embedded application programs that are integrated with FPGAs more easily.

2. Design Example

In this design example, we are going to create a system that consists of ZYNQ PS and GPIO on the PL. This system design consists of a GPIO that is implemented on the FPGA. The GPIO is connected to the AXI interconnect via the General-Purpose AXI Ports.

Figure 5. Block design of the GPIO example

We configure the ZYNQ PS by enabling UART 1. We are going to use this for communication between ZYNQ and the host PC.

Figure 6. Enabling UART 1 in ZYNQ PS

Then, we configure the AXI GPIO. Set the width to 4-bit because we only have 4 LEDs on the ZyBo. Set the default value to 0x00000005 so that when the FPGA is programmed, the LED is turned on.

Figure 7. Configuring the AXI GPIO

After the AXI GPIO is connected to the PS, it gets the address as shown in the following figure. This address will be used in the C program.

Figure 8. The address of the AXI GPIO

The following code shows the C code to access the AXI GPIO. We use a C pointer that points to the address of the AXI GPIO IP. In the main program, we blink the LEDs and also send "Hello, World!" to the serial terminal.

helloworld.c

#include <stdio.h>
#include "sleep.h"

#define MEM_GPIO_BASE 	0x41200000

uint32_t *mem_gpio_p;

int main()
{
    mem_gpio_p = (uint32_t *)MEM_GPIO_BASE;

    while (1)
    {
        *(mem_gpio_p+0) = 0x0;
	sleep(1);
	*(mem_gpio_p+0) = 0xF;
	sleep(1);
	printf("Hello, World!\n");
    }

    return 0;
}

The following figure shows the result of the serial terminal.

Figure 9. UART output printed on the serial terminal

3. Conclusion

In this tutorial, we covered the ZYNQ SoC and a simple example that consists of an AXI GPIO.